//FileName   : bench
//Author     : -
//Description: bench
//ModifyDate : 2019-5-4
//Company    : -
//Copy right : -


module bench (
);

//internal wire define
wire          clk;
wire          rst_n;
wire [31:0]   pmem_rdat;
wire [19:0]   pmem_adr;
wire          pmem_ack;
wire          pmem_cs;
wire [31:0]   dmem_adr;
wire          dmem_cs;
wire          dmem_we;
wire [31:0]   dmem_wdat;
wire [31:0]   dmem_rdat;
wire          dmem_ack;
wire          test_cnt_eq_27;
wire          test_cnt_eq_3;
wire          test_cnt_eq_11;



//-------- verbose --------
  initial begin
      $fsdbDumpfile("test.fsdb");
      $fsdbDumpvars();
  end

clkgen clkgen(.clk(clk),.rst_n(rst_n));

pmem #(.ROM_INFILE("./datagen/test.s.hex"))pmem(.clk(clk),.rst_n(rst_n),.pmem_rdat(pmem_rdat),.pmem_adr(pmem_adr[10-1:0]),.pmem_ack(pmem_ack),.pmem_cs(pmem_cs));

dmem dmem(.clk(clk),.rst_n(rst_n),.dmem_adr(dmem_adr[10-1:0]),.dmem_cs(dmem_cs),.dmem_we(dmem_we),.dmem_wdat(dmem_wdat),.dmem_rdat(dmem_rdat),.dmem_ack(dmem_ack));

reqs_gen reqs_gen(.clk(clk),.rst_n(rst_n),.dmem_cs(dmem_cs),.dmem_we(dmem_we),.dmem_adr(dmem_adr[20-1:0]),.test_cnt_eq_27(test_cnt_eq_27),.test_cnt_eq_3(test_cnt_eq_3),.test_cnt_eq_11(test_cnt_eq_11));


//---------------------------------------------
//Instantiation: rv32i
//---------------------------------------------

rv32i rv32i(
    .clk                     (clk                 ),
    .rst_n                   (rst_n               ),
    .reqs                    ({3'd0,test_cnt_eq_27,28'd0}),    // i
    .pmem_cs                 (pmem_cs             ),    // o
    .pmem_adr                (pmem_adr            ),    // o
    .pmem_rdat               (pmem_rdat           ),    // i
    .pmem_ack                (pmem_ack            ),    // i
    .dmem_cs                 (dmem_cs             ),    // o
    .dmem_we                 (dmem_we             ),    // o
    .dmem_adr                (dmem_adr            ),    // o
    .dmem_wdat               (dmem_wdat           ),    // o
    .dmem_rdat               (dmem_rdat           ),    // i
    .dmem_ack                (dmem_ack            ),    // i
    .interrupt               (test_cnt_eq_3|test_cnt_eq_11)     // i
);


endmodule
